Date: Tue, 10 Dec 1996 20:34:01 GMT
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<title>Soha's Education</title>
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<h1> Soha Hassoun:  Education </h1>
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<img alt="o" src="./uw.gif"> <b>University of Washington</b>, Seattle, WA.<BR>
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University of Washington</b>, Seattle, WA. June 1993 - Present: <BR>
Working towards a Ph.D. in Computer Science and Engineering. <BR>
Topic:  Architectural Retiming.<BR>
Research interests: 
Computer Aided Design (timing verification, logic and high-level synthesis), 
synchronous circuit design, computer and processor 
architecture, and parallel implementations and architectures.<BR>
	Thesis Advisor:  Prof. Carl Ebeling.<BR>
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October 1991 - June 1993:  M.S. in Computer Science and Engineering. <BR>
Project Topic:  Improving finite state assignment for two-level
	programmable logic devices.  <BR>
Project Advisor:  Prof. Gaetano Borriello.<BR>
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<img alt="o" src="./mit_court.gif"> 
<b>Massachusetts Institute of Technology</b>,Cambridge, MA.<BR>
 September 1986 - May 1988: 
 M.S. in Electrical Engineering.   <BR>
 Thesis Topic:  A Memory Design for the Message-Driven Processor.<BR>
	Thesis Advisor:  Prof. Bill Dally.


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<img alt="o" src="./campanille.gif"><b> South Dakota State University</b>, Brookings, SD.   <BR>
  September 1982 - May 1986: 
 <i>B.S. in Electrical Engineering </i><BR>
Minor studies in Math and French.  
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